4006 "18-Stage Static Shift Register"

15.00 EGP

The 4006 is comprised of 4 separate “shift
register” sections; two sections of four stages and
two sections of five stages with an output tap at
the fourth stage. Each section has an independent
“single rail” data path. A common clock signal is
used for all stages.

SKU: IC_4006 Categories: ,
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CD4006B types are composed of 4 separate shift register sections: two sections of four stages and two sections of five stages with an output tap at the fourth stage. Each section has an independent single-rail data path.
A common clock signal is used for all stages. Data are shifted to the next stage on negative-going transitions of the clock. Through appropriate connections of inputs and outputs, multiple register sections of 4, 5, 8, and 9 stages or single register sections of 10, 12, 13, 14, 16, 17 and 18 stages can be implemented using one CD4006B package. Longer shift register sections can be assembled by using more than one CD4006B.
To facilitate cascading stages when clock rise and fall times are slow, an optional output (D1 4?) that is delayed one-half clock-cycle, is provided (see Truth Table for Output from Term. 2).
The CD4006B types are supplied in 14-lead hermetic dual-in-line ceramic packages (D and F suffixes), 14-lead dual-in-line plastic packages (E suffix), and in chip form (H suffix).

pin connection-MicroOhmElectronics


 
PIN DESCRIPTION

PIN No SYMBOL NAME AND FUNCTION
1, 4, 5, 6 D1 to D4 Data inputs
2 D1 4? Delayed Optional Output
13, 11, 10, 8 Dn 4 4 stage shift register
Output
12, 9 Dn 5 5 stage shift register
Output
3 CLOCK Clock Input
7 VSS Negative Supply Voltage
14 VDD Positive Supply Voltage

 
ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit
VDD Supply Voltage -0.5 to 22 V
VI DC Input Voltage -0.5 to VDD 0.5 V
II DC Input Current ? 10 mA
PD Power Dissipation per Package 200 mW
Power Dissipation per Output Transistor 100 mW
Top Operating Temperature -55 to 125 ?C
Tstg Storage Temperature -65 to 150 ?C

Datasheet?

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