The 4011 is a quad 2-input NAND gate. The outputs are fully buffered for the highest noise immunity and pattern insensitivity to output impedance. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input.
Pin description
رمز | Pin | وصف |
nA | 1, 5, 8, 12 | input |
nB | 2, 6, 9, 13 | input |
nY | 3, 4, 10, 11 | output |
VSS | 7 | ground (0 V) |
VDD | 14 | ?supply voltage |
رمز | معامل | شروط | دقيقة | الأعلى | وحدة |
VDD | supply voltage | ?0.5 | 18 | الخامس | |
IIK | input clamping current | VI < ?0.5 V or VI > VDD 0.5 V | ?10 | أماه | |
السادس | input voltage | ?0.5 | VDD 0.5 | الخامس | |
IOK | output clamping current | VO < ?0.5 V or VO > VDD 0.5 V | ?10 | أماه | |
II/O | input/output current | ?10 | أماه | ||
IDD | supply current | 50 | أماه | ||
Tstg | storage temperature | ?65 | 150 | ؟ج | |
Tamb | ambient temperature | ?40 | 125 | ؟ج | |
Ptot | total power dissipation | Tamb = ?40 ?C to 125 ?C | |||
SO14 | 500 | ميغاواط | |||
ص | power dissipation | per output | 100 | ميغاواط |
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