The 4017 is a 5-stage divide-by-10 Johnson counter with 10 decoded outputs and a carry out bit. The 4022 is a 4-stage divide-by-8 Johnson counter with 8 decoded outputs and a carry-out bit. These counters are cleared to their zero count by a logical “1” on their reset line. These counters are advanced on the positive edge of the clock signal when the clock enable signal is in the logical “0” state. The configuration of the 4017 and 4022 permits medium speed operation and assures a hazard free counting sequence. The 10/8 decoded outputs are normally in the logical “0” state and go to the logical “1” state only at their respective time slot. Each decoded output remains high for 1 full clock cycle. The carry-out signal completes a full cycle for every 10/8 clock input cycles and is used as a ripple carry signal to any succeeding stages.
- 5-V, 10-V, and 15-V parametric ratings
- Standardized, symmetrical output characteristics
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 ?A at 18 V over full package-temperature range; 100 nA at 18 V and 25?C
- Noise margin (full package-temperature range) =
1 V at VDD?= 5 V
2 V at VDD?= 10 V
2.5 V at VDD?= 15 V
- Meets all requirements of JEDEC Tentative Standard No. 13B, ?Standard Specifications for Description of ?B? Series CMOS Devices?
- Shift Registers
- Buffer/Storage Registers
- Pattern Generators